How the Control Unit Thinks in Time

A Visual Snapshot of the Control Unit.

In our last three blogs,
We saw how the Memory Hierarchy is layered,
how the Arithmetic Logic Unit executes,
and how Instruction pipelining is achieved by dividing the Instruction cycle into stages and operating in parallel.

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From the Arithmetic Logic Unit and Instruction Pipelining Blog:

We know that, to execute a task, the Arithmetic Logic unit needs to select appropriate logic gates by multiplexers, which form a Boolean equation and get simplified by k-maps and executed by half adders, full adders, comparators and multipliers.

If you compare this whole execution flow to one of our Instruction stages in the pipeline.
It represents one of our Instruction pipeline stages

Instruction Fetch(IF) - control unit fetching new orders.
Instruction decode(ID) - control unit decoding what command signals to give.
Memory Access(MEM) - storage fetching new ingredients(data).
Execute(EX) - the AL Unit(Chef) Cooks.
Writing back(WB) - the final result is served(stored or displayed).

We also know that,

In a single tick of the clock:
while Chef(ALU) is executing the previous task,
The control unit would be fetching a new order or decoding the new order.
The helper would roll out new data(Ingredients),
The waiter would be serving the food.

So, we will pick one unit and integrate what we know. In one tick, ALU is executing the task(previous or current), and it has its own pipelining stage, which is EX(Execute), but to execute it has to follow the procedure(which we discussed in the first quote). So how can it handle it in one tick?

That’s where Micro-Operations come in. Each of those internal steps inside ALU(selecting different gates, commanding to use K-maps, triggering an adder or comparators to execute) is called a Micro-Operation, and these micro operations are controlled by the Control Unit.

The same happens when the Memory Unit(MU), which has its own pipelining stage MEM(Memory Access), fetches the data.
Control Unit commands:
“Look at Cache first”, if not, “try RAM”, else go “all the way to SSD”. Each of these small actions comes under Micro-Operations, too.

And we can say that, Each clock cycle triggers specific micro-operations defined by the control unit. Over many cycles, complex instructions are completed step by step. These micro-operations determine the Architecture of a computer. If these micro-operations are hardwired, then it is an ARM architecture; if these micro-operations are microprogrammed, it is an x86 architecture.

So, how does the Control Unit handle this much chaos in one tick???

That’s where the Control Sequencer steps in. The control unit generates time-coordinated control signals. But why?
Because without time,
the signals would collide, executions would overlap, and the CPU would turn into pure noise.

We have a common understanding that in our lives, time represents continuous progression from the past, through the present, into the future. In the same way, this process is also designed. Which we learned but didn’t observe. From our 3rd quote.

In a single tick of the clock:
while Chef(ALU) is executing the previous task - (past execution of the instruction)
The control unit would be fetching a new order or decoding the new order - (future instruction fetching)
The helper would roll out new data(Ingredients) - (present data loading)
The waiter would be serving the food.

And to make this happen, it uses Sequential Circuits. Because time and memory(Flip-Flops) are tied together here, but why? Because it needs to remember what happened in the last tick to decide what happens in the next.

Here, remembering what happened in the last tick is nothing but storing the state of its execution, and where does it store it? The Answer is Registers.

Each register remembers a specific part of the CPU’s ongoing story:

• Program Counter(PC): It holds the address of the next instruction to execute.

• Instruction Register(IR): It holds the current Instruction being decoded or executed

• Memory Address Register(MAR): It holds the addresses of the data that needs to be looked at.

• Memory Data Register(MDR): It holds the data that has just come in or is about to go out.

But why does it need to store the previous states of execution at all?

We will take one simple Boolean algebra equation: A + B - C * D. To execute this, it first calculates C * D and stores its value in MDR, then it calculates A + B and stores its value in MDR, and then these two values will be executed by using the “-” sign.

Sequential Circuits are built using flip-flops as the fundamental blocks, like how Combinational Circuits are built using Logic gates as the fundamental blocks.

Finally, the control unit represents:

• Decoder: decodes the opcode, operand, address, and destination(using combinational circuits, same as the Arithmetic Logic Unit procedure(quote 1)).

• Control Sequencer: decides when specific signals, data, and addresses are to be sent.

• Registers: Stores the addresses, data that are and about to be executed and fetched.

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We have completed the whole data flow, control flow of the Computer Architecture involving all the units of CPU, and in our next blogs, we will see how operating systems come into play and before that, why an operating system is even needed.